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IPPS
2002
IEEE
16 years 6 days ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
ISCA
2002
IEEE
123views Hardware» more  ISCA 2002»
16 years 6 days ago
Going the Distance for TLB Prefetching: An Application-Driven Study
The importance of the Translation Lookaside Buffer (TLB) on system performance is well known. There have been numerous prior efforts addressing TLB design issues for cutting down ...
Gokul B. Kandiraju, Anand Sivasubramaniam
ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
16 years 6 days ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
WMTE
2002
IEEE
16 years 6 days ago
To Unlock the Learning Value of Wireless Mobile Devices, Understand Coupling
Handheld computers will become an increasingly compelling choice of technology for K-12 classrooms because they will enable a transition from occasional, supplemental use to frequ...
Jeremy Roschelle, Charles Patton, Roy D. Pea
ICFCA
2010
Springer
16 years 2 days ago
A Survey of Hybrid Representations of Concept Lattices in Conceptual Knowledge Processing
A feature of Formal Concept Analysis is the use of the line diagram of the concept lattice to visualize a conceptual space. The line diagram is a specialized form of Hasse diagram ...
Peter W. Eklund, Jean Villerd