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EUROGP
2001
Springer
124views Optimization» more  EUROGP 2001»
15 years 11 months ago
An Evolutionary Approach to Automatic Generation of VHDL Code for Low-Power Digital Filters
An evolutionary algorithm is used to design a finite impulse response digital filter with reduced power consumption. The proposed design approach combines genetic optimization an...
Massimiliano Erba, Roberto Rossi, Valentino Libera...
EH
2000
IEEE
183views Hardware» more  EH 2000»
15 years 11 months ago
A Reconfigurable Platform for the Automatic Synthesis of Analog Circuits
Reconfigurable chips are integrated circuits whose internal connections can be programmed by the user to attend a specific application. Field Programmable Gate Arrays (FPGAs) and ...
Ricardo Salem Zebulum, Cristina Costa Santini, Hel...
ICDCS
2000
IEEE
15 years 11 months ago
Static and Adaptive Data Replication Algorithms for Fast Information Access in Large Distributed Systems
Creating replicas of frequently accessed objects across a read-intensive network can result in large bandwidth savings which, in turn, can lead to reduction in user response time....
Thanasis Loukopoulos, Ishfaq Ahmad
IJCNN
2000
IEEE
15 years 11 months ago
Two Sites of Synaptic Integration: Relevant for Learning?
Since the classical work of D. O. Hebb [1] it has been assumed that synaptic plasticity solely depends on the activity of the pre- and the postsynaptic cell. Synapses influence th...
Konrad P. Körding, Peter König
IPPS
2000
IEEE
15 years 11 months ago
Dynamic Data Layouts for Cache-Conscious Factorization of DFT
Effective utilization of cache memories is a key factor in achieving high performance in computing the Discrete Fourier Transform (DFT). Most optimizationtechniques for computing ...
Neungsoo Park, Dongsoo Kang, Kiran Bondalapati, Vi...