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ASPDAC
2004
ACM
144views Hardware» more  ASPDAC 2004»
15 years 10 months ago
Verification of timed circuits with symbolic delays
When time is incorporated in the specification of discrete systems, the complexity of verification grows exponentially. When the temporal behavior is specified with symbols, the ve...
Robert Clarisó, Jordi Cortadella
161
Voted
DAC
1998
ACM
16 years 8 months ago
Design and Specification of Embedded Systems in Java Using Successive, Formal Refinement
Successive, formal refinement is a new approach for specification of embedded systems using a general-purpose programming language. Systems are formally modeled as Abstractable Sy...
James Shin Young, Josh MacDonald, Michael Shilman,...
194
Voted
SAC
2005
ACM
16 years 19 days ago
Formal modeling and quantitative analysis of KLAIM-based mobile systems
KLAIM is an experimental language designed for modeling and programming distributed systems composed of mobile components where distribution awareness and dynamic system architect...
Rocco De Nicola, Diego Latella, Mieke Massink
CODES
2001
IEEE
15 years 10 months ago
Formal synthesis and code generation of embedded real-time software
Due to rapidly increasing system complexity, shortening time-tomarket, and growing demand for hard real-time systems, formal methods are becoming indispensable in the synthesis of...
Pao-Ann Hsiung
IJIT
2004
15 years 8 months ago
Formal Verification of a Multicast Protocol In Mobile Networks
As computer network technology becomes increasingly complex, it becomes necessary to place greater requirements on the validity of developing standards and the resulting technology...
Mohammad Reza Matash Borujerdi, S. M. Mirzababaei