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DATE
2004
IEEE
152views Hardware» more  DATE 2004»
15 years 11 months ago
A Design Methodology for the Exploitation of High Level Communication Synthesis
In this paper we analyse some methodological concerns that have to be faced in a design flow which contains automatic synthesis phases from high-level, system descriptions. In par...
Francesco Bruschi, Massimo Bombana
CCECE
2006
IEEE
16 years 1 months ago
QOS Driven Network-on-Chip Design for Real Time Systems
Real Time embedded system designers are facing extreme challenges in underlying architectural design selection. It involves the selection of a programmable, concurrent, heterogene...
Ankur Agarwal, Mehmet Mustafa, Abhijit S. Pandya
ICCAD
1997
IEEE
86views Hardware» more  ICCAD 1997»
15 years 11 months ago
Interconnect design for deep submicron ICs
Interconnect has become the dominating factor in determining circuit performance and reliability in deep submicron designs. In this embedded tutorial, we first discuss the trends...
Jason Cong, David Zhigang Pan, Lei He, Cheng-Kok K...
CAD
2007
Springer
15 years 7 months ago
A new digital human environment and assessment of vehicle interior design
Vehicle interior design directly relates to driver performance measures such as comfort, efficiency, risk of injury, and vehicle safety. A digital human is a convenient tool for ...
Jingzhou Yang, Joo H. Kim, Karim Abdel-Malek, Timo...
IADIS
2008
15 years 8 months ago
e-Learning Courseware Effort Estimate Model
This paper presents an improved software estimation model, which uses to estimate developing effort of e-Learning's contents. This model is called the e-Learning courseware E...
Vajirasak Vanijja, Athitha Chokananratana