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ICCD
2006
IEEE
117views Hardware» more  ICCD 2006»
16 years 4 months ago
System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors
—Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design. Multiprocessors-ona-Programmable-Chi...
Xiaofang Wang, Sotirios G. Ziavras
RTAS
2003
IEEE
16 years 17 days ago
Tool Set Implementation for Scenario-based Multithreading of UML-RT Models and Experimental Validation
This paper presents our tool set implementation for scenario-based multithreading of object-oriented realtime models and an accompanying experimental validation. Our tools enable ...
Jamison Masse, Saehwa Kim, Seongsoo Hong
CAD
1998
Springer
15 years 7 months ago
CAD and the product master model
We develop an architecture for a product master model that federates CAD systems with downstream application processes for di erent feature views that are part of the design proce...
Christoph M. Hoffmann, Robert Joan-Arinyo
ACSD
2006
IEEE
102views Hardware» more  ACSD 2006»
15 years 9 months ago
Models of Computation for Networks on Chip
Networks on chip platforms offer the opportunity to introduce a new abstraction level that defines a set of platform services with performance and power characteristics. By making...
Axel Jantsch
CODES
2007
IEEE
16 years 1 months ago
Embedded software development on top of transaction-level models
Early embedded SW development with transaction-level models has been broadly promoted to improve SoC design productivity. But the proposed APIs only provide low-level read/write o...
Wolfgang Klingauf, Robert Günzel, Christian S...