As DRAM access latencies approach a thousand instructionexecution times and on-chip caches grow to multiple megabytes, it is not clear that conventional cache structures continue ...
The goal of this work is to study the feasibility of a Heterogeneous Data Classification and Search (HDCS) system and to provide a possible design for its implementing. In order t...
Dorin Carstoiu, Alexandra Cernian, Adriana Olteanu...
Abstract--Real-time stereo vision is attractive in many applications like robot navigation and 3D scene reconstruction. Data parallel platforms, e.g. GPU, is often used for real-ti...
Wei Yu, Tsuhan Chen, Franz Franchetti, James C. Ho...
— This paper investigates theoretical aspects of the uneven energy depletion phenomenon recently noticed in sink-based wireless sensor networks. We consider uniformly distributed...
The theory of latency-insensitive design (LID) was recently invented to cope with the time closure problem in otherwise synchronous circuits and programs. The idea is to allow the...
Julien Boucaron, Robert de Simone, Jean-Vivien Mil...