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203
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CAV
1998
Springer
98views Hardware» more  CAV 1998»
15 years 11 months ago
Verification of Timed Systems Using POSETs
This paper presents a new algorithm for efficiently verifying timed systems. The new algorithm represents timing information using geometric regions and explores the timed state sp...
Wendy Belluomini, Chris J. Myers
ICCAD
1997
IEEE
94views Hardware» more  ICCAD 1997»
15 years 11 months ago
PRIMA: passive reduced-order interconnect macromodeling algorithm
— This paper describes an algorithm for generating provably passive reduced-order N-port models for RLC interconnect circuits. It is demonstrated that, in addition to macromodel ...
Altan Odabasioglu, Mustafa Celik, Lawrence T. Pile...
194
Voted
ISSS
1997
IEEE
109views Hardware» more  ISSS 1997»
15 years 11 months ago
Reducing the Complexity of ILP Formulations for Synthesis
Integer Linear Programming ILP is commonly used in high level and system level synthesis. It is an NP-Complete problem in general cases. There exists some tools that give an o...
Anne Mignotte, Olivier Peyran
PLDI
1997
ACM
15 years 11 months ago
Data-centric Multi-level Blocking
We present a simple and novel framework for generating blocked codes for high-performance machines with a memory hierarchy. Unlike traditional compiler techniques like tiling, whi...
Induprakas Kodukula, Nawaaz Ahmed, Keshav Pingali
CVPR
1996
IEEE
15 years 11 months ago
A Space-Sweep Approach to True Multi-Image Matching
The problem of determining feature correspondences across multiple views is considered. The term true multi-image" matching is introduced to describe techniques that make ful...
Robert T. Collins