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ITC
2003
IEEE
222views Hardware» more  ITC 2003»
16 years 8 days ago
Race: A Word-Level ATPG-Based Constraints Solver System For Smart Random Simulation
Functional verification of complex designs largely relies on the use of simulation in conjunction high-level verification languages (HVL) and test-bench automation (TBA) tools. In...
Mahesh A. Iyer
ITC
2003
IEEE
106views Hardware» more  ITC 2003»
16 years 8 days ago
Detection of Resistive Shorts in Deep Sub-micron Technologies
Current-based tests are the most effective methods available to detect resistive shorts. Delta IDDQ testing is the most sensitive variant and can handle off-state currents of 10-1...
Bram Kruseman, Stefan van den Oetelaar
ITC
2003
IEEE
139views Hardware» more  ITC 2003»
16 years 8 days ago
Fault Pattern Oriented Defect Diagnosis for Memories
Failure analysis (FA) and diagnosis of memory cores plays a key role in system-on-chip (SOC) product development and yield ramp-up. Conventional FA based on bitmaps and the experi...
Chih-Wea Wang, Kuo-Liang Cheng, Jih-Nung Lee, Yung...
MSE
2003
IEEE
104views Hardware» more  MSE 2003»
16 years 8 days ago
Internet-based Tool for System-on-Chip Integration
A tool has been created for use in a design course to automate integration of new components into a SystemOn-Chip (SoC). Students used this tool to implement a complete SoC Intern...
David Lim, Christopher E. Neely, Christopher K. Zu...
PG
2003
IEEE
16 years 8 days ago
Iso-Splatting: A Point-Based Alternative to Isosurface Visualization
We present a new approach to isosurface visualization that we call “iso-splatting.” We use point primitives for representing and rendering isosurfaces. The method consists of ...
Christopher S. Co, Bernd Hamann, Kenneth I. Joy