Sciweavers

10700 search results - page 1713 / 2140
» Generative Design Patterns
Sort
View
ASPLOS
2004
ACM
16 years 1 months ago
An ultra low-power processor for sensor networks
We present a novel processor architecture designed specifically for use in low-power wireless sensor-network nodes. Our sensor network asynchronous processor (SNAP/LE) is based on...
Virantha N. Ekanayake, Clinton Kelly IV, Rajit Man...
ICCAD
2003
IEEE
99views Hardware» more  ICCAD 2003»
16 years 26 days ago
A Probabilistic Approach to Buffer Insertion
This work presents a formal probabilistic approach for solving optimization problems in design automation. Prediction accuracy is very low especially at high levels of design flo...
Vishal Khandelwal, Azadeh Davoodi, Akash Nanavati,...
DATE
2010
IEEE
113views Hardware» more  DATE 2010»
16 years 21 days ago
PM-COSYN: PE and memory co-synthesis for MPSoCs
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
Yi-Jung Chen, Chia-Lin Yang, Po-Han Wang
PASTE
2010
ACM
16 years 20 days ago
Opportunities for concurrent dynamic analysis with explicit inter-core communication
Multicore is now the dominant processor trend, and the number of cores is rapidly increasing. The paradigm shift to multicore forces the redesign of the software stack, which incl...
Jungwoo Ha, Stephen P. Crago
ICPP
2000
IEEE
15 years 12 months ago
Simultaneous Multithreading-Based Routers
This work considers the use of a n S M T (simultaneous multithreading) processor in lieu of the conventional processor(s) in a router and evaluates quantitatively the potential ga...
Kemathat Vibhatavanij, Nian-Feng Tzeng, Angkul Kon...
« Prev « First page 1713 / 2140 Last » Next »