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» Geometry of synthesis: a structured approach to VLSI design
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CODES
2006
IEEE
16 years 23 days ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
DATE
1998
IEEE
109views Hardware» more  DATE 1998»
15 years 11 months ago
Cross-Level Hierarchical High-Level Synthesis
This paper presents a new approach to cross-level hierarchical high-level synthesis. A methodology is presented, that supports the efficient synthesis of hierarchical specified sy...
Oliver Bringmann, Wolfgang Rosenstiel
TASLP
2010
103views more  TASLP 2010»
15 years 5 months ago
Percussion Synthesis Based on Models of Nonlinear Shell Vibration
—The synthesis of sound based on physical models of 2-D percussion instruments is problematic and has been approached only infrequently in the literature. Beyond the computationa...
Stefan Bilbao
CODES
2007
IEEE
16 years 1 months ago
Reliable multiprocessor system-on-chip synthesis
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
Changyun Zhu, Zhenyu (Peter) Gu, Robert P. Dick, L...
GECCO
2007
Springer
268views Optimization» more  GECCO 2007»
16 years 26 days ago
Synthesis of analog filters on an evolvable hardware platform using a genetic algorithm
This work presents a novel approach to filter synthesis on a field programmable analog array (FPAA) architecture using a genetic algorithm (GA). First, a Matlab model of the FPA...
Joachim Becker, Stanis Trendelenburg, Fabian Henri...