104 search results - page 18 / 21 » Hardware Architecture for Fast Camera Effects Rendering |
190
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DAC
2006
ACM
16 years 15 days ago
2006
ACM
This article describes a new software-based on-line memory compression algorithm for embedded systems and presents a method of adaptively managing the uncompressed and compressed ...
168
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DAC
2006
ACM
15 years 10 months ago
2006
ACM
Conventionally, signal net routing is almost always implemented as Steiner trees. However, non-tree topology is often superior on timing performance as well as tolerance to open f...
163
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SIGGRAPH
1991
ACM
15 years 10 months ago
1991
ACM
We present an interactive modeling and animation system that facilitates the integration of a variety of simulation and animation paradigms. This system permits the modeling of di...
208
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HPCA
2011
IEEE
14 years 10 months ago
2011
IEEE
The number of cores in a single chip multiprocessor is expected to grow in coming years. Likewise, aggregate on-chip cache capacity is increasing fast and its effective utilizatio...
155
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MICRO
1995
IEEE
15 years 10 months ago
1995
IEEE
Untolerated load instruction latencies often have a significant impact on overall program performance. As one means of mitigating this effect, we present an aggressive hardware-b...