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DDECS
2006
IEEE
146views Hardware» more  DDECS 2006»
15 years 11 months ago
Automatic Identification of Timing Anomalies for Cycle-Accurate Worst-Case Execution Time Analysis
Abstract-- Hard real-time systems need methods to determine upper bounds for their execution times, usually called worst-case execution times. Timing anomalies are counterintuitive...
Jochen Eisinger, Ilia Polian, Bernd Becker, Alexan...
CODES
2007
IEEE
16 years 1 months ago
Power deregulation: eliminating off-chip voltage regulation circuitry from embedded systems
In battery-powered embedded systems, dedicated circuitry is used to convert stored energy into a form that can be directly used by processors. These power regulation devices seek ...
Seunghoon Kim, Robert P. Dick, Russ Joseph
TVCG
2008
138views more  TVCG 2008»
15 years 7 months ago
Real-Time Path Planning in Dynamic Virtual Environments Using Multiagent Navigation Graphs
We present a novel approach for efficient path planning and navigation of multiple virtual agents in complex dynamic scenes. We introduce a new data structure, Multiagent Navigatio...
Avneesh Sud, Erik Andersen, Sean Curtis, Ming C. L...
IPPS
2000
IEEE
15 years 11 months ago
Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
Ravi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda
FPL
2009
Springer
145views Hardware» more  FPL 2009»
16 years 1 days ago
Area estimation and optimisation of FPGA routing fabrics
This paper presents a methodology for estimating and optimising FPGA routing fabrics using high-level modelling and convex optimisation techniques. Experimental methods for explor...
Alastair M. Smith, George A. Constantinides, Peter...