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ISORC
2008
IEEE
16 years 1 months ago
Hardware Objects for Java
Java, as a safe and platform independent language, avoids access to low-level I/O devices or direct memory access. In standard Java, low-level I/O it not a concern; it is handled ...
Martin Schoeberl, Christian Thalinger, Stephan Kor...
SBACPAD
2008
IEEE
170views Hardware» more  SBACPAD 2008»
16 years 1 months ago
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
James Poe, Chang-Burm Cho, Tao Li
ASAP
2007
IEEE
101views Hardware» more  ASAP 2007»
16 years 1 months ago
Hardware Design of a Binary Integer Decimal-based IEEE P754 Rounding Unit
Because of the growing importance of decimal floating-point (DFP) arithmetic, specifications for it were recently added to the draft revision of the IEEE 754 Standard (IEEE P754)....
Charles Tsen, Michael J. Schulte, Sonia Gonzalez-N...
ASAP
2007
IEEE
136views Hardware» more  ASAP 2007»
16 years 1 months ago
0/1 Knapsack on Hardware: A Complete Solution
We present a memory efficient, practical, systolic, parallel architecture for the complete 0/1 knapsack dynamic programming problem, including backtracking. This problem was inte...
K. Nibbelink, S. Rajopadhye, R. McConnell
CHES
2007
Springer
157views Cryptology» more  CHES 2007»
16 years 1 months ago
A Hardware-Assisted Realtime Attack on A5/2 Without Precomputations
Abstract. A5/2 is a synchronous stream cipher that is used for protecting GSM communication. Recently, some powerful attacks [2,10] on A5/2 have been proposed. In this contribution...
Andrey Bogdanov, Thomas Eisenbarth, Andy Rupp