Sciweavers

5977 search results - page 428 / 1196
» Hierarchical Performance Modeling for Distributed System Arc...
Sort
View
CODES
2005
IEEE
16 years 1 months ago
A power estimation methodology for systemC transaction level models
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
Nagu R. Dhanwada, Ing-Chao Lin, Vijay Narayanan
DAC
2002
ACM
16 years 8 months ago
A framework for evaluating design tradeoffs in packet processing architectures
We present an analytical method to evaluate embedded network packet processor architectures, and to explore their design space. Our approach is in contrast to those based on simul...
Lothar Thiele, Matthias Gries, Samarjit Chakrabort...
LCTRTS
2010
Springer
16 years 2 months ago
Versatile system-level memory-aware platform description approach for embedded MPSoCs
In this paper, we present a novel system modeling language which targets primarily the development of source-level multiprocessor memory aware optimizations. In contrast to previo...
Robert Pyka, Felipe Klein, Peter Marwedel, Stylian...
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
16 years 1 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
SOSP
2003
ACM
16 years 4 months ago
Measurement, modeling, and analysis of a peer-to-peer file-sharing workload
Peer-to-peer (P2P) file sharing accounts for an astonishing volume of current Internet traffic. This paper probes deeply into modern P2P file sharing systems and the forces that...
P. Krishna Gummadi, Richard J. Dunn, Stefan Saroiu...