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ASAP
2010
IEEE
138views Hardware» more  ASAP 2010»
15 years 8 months ago
Enhancing performance of network-on-chip architectures with millimeter-wave wireless interconnects
In a traditional Network-on-Chip (NoC), latency and power dissipation increase with system size due to its inherent multi-hop communications. The performance of NoC communication ...
Sujay Deb, Amlan Ganguly, Kevin Chang, Partha Prat...
ICS
2009
Tsinghua U.
16 years 1 months ago
MPI-aware compiler optimizations for improving communication-computation overlap
Several existing compiler transformations can help improve communication-computation overlap in MPI applications. However, traditional compilers treat calls to the MPI library as ...
Anthony Danalis, Lori L. Pollock, D. Martin Swany,...
WMPI
2004
ACM
16 years 5 days ago
Compiler-optimized usage of partitioned memories
In order to meet the requirements concerning both performance and energy consumption in embedded systems, new memory architectures are being introduced. Beside the well-known use o...
Lars Wehmeyer, Urs Helmig, Peter Marwedel
CASES
2007
ACM
15 years 10 months ago
SCCP/x: a compilation profile to support testing and verification of optimized code
Embedded systems are often used in safety-critical environments. Thus, thorough testing of them is mandatory. A quite active research area is the automatic test-case generation fo...
Raimund Kirner
IEEEPACT
2006
IEEE
16 years 23 days ago
Fast, automatic, procedure-level performance tuning
This paper presents an automated performance tuning solution, which partitions a program into a number of tuning sections and finds the best combination of compiler options for e...
Zhelong Pan, Rudolf Eigenmann