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MICRO
1997
IEEE
110views Hardware» more  MICRO 1997»
15 years 11 months ago
The Design and Performance of a Conflict-Avoiding Cache
High performance architectures depend heavily on efficient multi-level memory hierarchies to minimize the cost of accessing data. This dependence will increase with the expected i...
Nigel P. Topham, Antonio González, Jos&eacu...
ICIP
2000
IEEE
16 years 8 months ago
Performance Analysis of an H.263 Video Encoder for VIRAM
VIRAM (Vector Intelligent Random Access Memory) is a vector architecture processor with embedded memory, designed for portable multimedia processing devices. Its vector processing...
Thinh P. Q. Nguyen, Avideh Zakhor, Katherine A. Ye...
GLOBECOM
2008
IEEE
16 years 1 months ago
Performance Comparison between NEMO BSP and SINEMO
Abstract—IETF has proposed Mobile IPv6-based Network Mobility (NEMO) basic support protocol (BSP) to support network mobility. NEMO BSP inherits all the drawbacks of Mobile IPv6,...
Md. Sazzadur Rahman, Outman Bouidel, Mohammed Atiq...
VTC
2008
IEEE
107views Communications» more  VTC 2008»
16 years 1 months ago
On the Performance of Selection Relaying
—Interest in selection relaying is growing. The recent developments in this area have largely focused on information theoretic analyses such as outage performance. Some of these ...
Abdulkareem Adinoyi, Yijia Fan, Halim Yanikomerogl...
AINA
2007
IEEE
16 years 1 months ago
Event based Extensible Interactive Transparent Networking: Performance Study with Fast TCP Principles
Interactive Transparent Networking has been proposed to support a new generation of symbiotic applications that require advance interaction with the Network. In this mode advanced...
Javed I. Khan, Pradeep K. Punnam, Raid Zaghal