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DAC
2003
ACM
16 years 25 days ago
Low-power design methodology for an on-chip bus with adaptive bandwidth capability
This paper describes a low-power design methodology for a bus architecture based on hybrid current/voltage mode signaling for deep sub-micrometer on-chip interconnects that achiev...
Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III
SPAA
2003
ACM
16 years 24 days ago
Throughput-centric routing algorithm design
The increasing application space of interconnection networks now encompasses several applications, such as packet routing and I/O interconnect, where the throughput of a routing a...
Brian Towles, William J. Dally, Stephen P. Boyd
CVPR
2010
IEEE
16 years 23 days ago
Anatomical Parts-Based Regression Using Non-Negative Matrix Factorization
Non-negative matrix factorization (NMF) is an excellent tool for unsupervised parts-based learning, but proves to be ineffective when parts of a whole follow a specific pattern. ...
Swapna Joshi, Karthikeyan Shanmugavadivel, B.S. Ma...
CLUSTER
2002
IEEE
16 years 16 days ago
Kernel-Level Caching for Optimizing I/O by Exploiting Inter-Application Data Sharing
With applications becoming larger and the increasing load on high performance systems, it is important to tackle the I/O bottleneck problem from several angles. It is not only ess...
Murali Vilayannur, Mahmut T. Kandemir, Anand Sivas...
ISPAN
2002
IEEE
16 years 14 days ago
On the Impact of Naming Methods for Heap-Oriented Pointers in C Programs
Many applications written in C allocate memory blocks for their major data structures from the heap space at runtime. The analysis of heap-oriented pointers in such programs is cr...
Tong Chen, Jin Lin, Wei-Chung Hsu, Pen-Chung Yew