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ESAS
2004
Springer
16 years 18 days ago
Secure AES Hardware Module for Resource Constrained Devices
Abstract. Low power consumption, low gate count, and high throughput are standard design criteria for cryptographic coprocessors designated for resource constrained devices such as...
Elena Trichina, Tymur Korkishko
GECCO
2004
Springer
129views Optimization» more  GECCO 2004»
16 years 18 days ago
Memetic Optimization of Video Chain Designs
Abstract. Improving image quality is the backbone of highly competitive display industry. Contemporary video processing system design is a challenging optimization problem. General...
Walid Ali, Alexander P. Topchy
ICCS
2004
Springer
16 years 18 days ago
Active and Logistical Networking for Grid Computing: The E-toile Architecture
While active networks provide new solutions for the deployment of dynamic services in the network, exposing network processing resources, logistical networking focuses on exposing...
Alessandro Bassi, Micah Beck, Fabien Chanussot, Je...
WDAG
2004
Springer
134views Algorithms» more  WDAG 2004»
16 years 17 days ago
An Optimistic Approach to Lock-Free FIFO Queues
Abstract. First-in-first-out (FIFO) queues are among the most fundamental and highly studied concurrent data structures. The most effective and practical dynamic-memory concurren...
Edya Ladan-Mozes, Nir Shavit
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
16 years 14 days ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
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