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ECIS
2001
15 years 8 months ago
Using Problem-Domain and Artefact-Domain Architectural Modelling to Understand System Evolution
The authors describe on going research to uncover the architectonic nature of artefacts and see how these may be related to high-level, but also grounded, model of the original pr...
Thomas R. Addis, Galal Hassan Galal
208
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ASPLOS
2011
ACM
14 years 10 months ago
Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...
Luke Dalessandro, François Carouge, Sean Wh...
DAC
2012
ACM
13 years 9 months ago
A metric for layout-friendly microarchitecture optimization in high-level synthesis
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
Jason Cong, Bin Liu
ECSCW
2001
15 years 8 months ago
On finding things out: Situating organisational knowledge in CSCW
We present a field study of an organisation which designs and constructs precision mechatronic devices, which typically integrate electronics, mechanical assemblies, computer hardw...
Kristina Groth, John Bowers
PLDI
2005
ACM
16 years 20 days ago
Programming by sketching for bit-streaming programs
This paper introduces the concept of programming with sketches, an approach for the rapid development of high-performance applications. This approach allows a programmer to write ...
Armando Solar-Lezama, Rodric M. Rabbah, Rastislav ...