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HOTI
2005
IEEE
16 years 1 months ago
Hybrid Cache Architecture for High Speed Packet Processing
: The exposed memory hierarchies employed in many network processors (NPs) are expensive in terms of meeting the worst-case processing requirement. Moreover, it is difficult to ef...
Zhen Liu, Kai Zheng, Bin Liu
GLVLSI
2010
IEEE
136views VLSI» more  GLVLSI 2010»
16 years 19 days ago
Thermal-aware compilation for system-on-chip processing architectures
The development of compiler-based mechanisms to reduce the percentage of hotspots and optimize the thermal profile of large register files has become an important issue. Thermal...
Mohamed M. Sabry, José L. Ayala, David Atie...
191
Voted
COMPSAC
2002
IEEE
16 years 15 days ago
A Distributed Architecture for Cooperative and Adaptative Multimedia Applications
Previously, we developed a method and a distributed platform for the re-engineering of applications by adding cooperation. The goal was to supply a way of communication based on t...
Philippe Roose, Marc Dalmau, Franck Luthon
206
Voted
VLDB
2001
ACM
138views Database» more  VLDB 2001»
15 years 12 months ago
A Data Warehousing Architecture for Enabling Service Provisioning Process
In this paper we focus on the following problem in information management: given a large collection of recorded information and some knowledge of the process that is generating th...
Yannis Kotidis
DSN
2004
IEEE
15 years 11 months ago
SCIDIVE: A Stateful and Cross Protocol Intrusion Detection Architecture for Voice-over-IP Environments
Voice over IP (VoIP) systems are gaining in popularity as the technology for transmitting voice traffic over IP networks. As the popularity of VoIP systems increases, they are bei...
Yu-Sung Wu, Saurabh Bagchi, Sachin Garg, Navjot Si...