2201 search results - page 238 / 441 » Improvement of ASIC Design Processes |
163
click to vote
DATE
2008
IEEE
16 years 1 months ago
2008
IEEE
A new algorithm is presented that combines performance and variation objectives in a behavioural model for a given analogue circuit topology and process. The tradeoffs between per...
287
click to vote
P2P
2008
IEEE
16 years 1 months ago
2008
IEEE
Many different Distributed Hash Tables (DHTs) have been designed, but only few have been successfully deployed. The implementation of a DHT needs to deal with practical aspects (e...
158
Voted
HUC
2007
Springer
16 years 1 months ago
2007
Springer
We describe our experience building and using a reasoning system for providing context-based prompts to elders to take their medication. We describe the process of specification, ...
227
click to vote
DAC
2006
ACM
16 years 1 months ago
2006
ACM
This paper investigates methods for clock skew minimization using buffer and wire sizing. First, a technique that significantly improves solution quality and stability of sequent...
175
click to vote
DAC
2006
ACM
16 years 1 months ago
2006
ACM
: Creating ICs in the nanometer age is a high-stakes race that few companies can afford to compete in – and even fewer can win. Hear how senior technologists from the world’s t...