3028 search results - page 183 / 606 » Integrating Temporal Logics |
208
click to vote
CSCW
2010
ACM
15 years 4 months ago
2010
ACM
This paper addresses the collaborative development of information infrastructure for supporting data-rich scientific collaboration. Studying infrastructure development empirically ...
188
click to vote
DAC
2004
ACM
16 years 18 days ago
2004
ACM
The Pentium® 4 processor architecture uses a 2x frequency core clock[1] to implement low latency integer ops. Low Voltage Swing logic circuits implemented in 90nm technology[2] m...
177
click to vote
ENTCS
2002
15 years 7 months ago
2002
We investigate a variant of dense-time Duration Calculus which permits model checking using timed/hybrid automata. We define a variant of the Duration Calculus, called Interval Du...
197
click to vote
CORR
2008
Springer
15 years 6 months ago
2008
Springer
In a seminal paper from 1985, Sistla and Clarke showed that the model-checking problem for Linear Temporal Logic (LTL) is either NP-complete or PSPACE-complete, depending on the se...
185
click to vote
TOCL
2011
15 years 2 months ago
2011
In a seminal paper from 1985, Sistla and Clarke showed that the model-checking problem for Linear Temporal Logic (LTL) is either NP-complete or PSPACE-complete, depending on the s...