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» Integrating Temporal Logics
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FPGA
2001
ACM
137views FPGA» more  FPGA 2001»
15 years 11 months ago
Detailed routing architectures for embedded programmable logic IP cores
As the complexity of integrated circuits increases, the ability to make post-fabrication changes to fixed ASIC chips will become more and more attractive. This ability can be real...
Peter Hallschmid, Steven J. E. Wilton
AMAST
2000
Springer
15 years 11 months ago
A New Logic for Electronic Commerce Protocols
The primary objective of this paper is to present the deÿnition of a new dynamic, linear and modal logic for security protocols. The logic is compact, expressive and formal. It a...
Kamel Adi, Mourad Debbabi, Mohamed Mejri
CORR
2010
Springer
123views Education» more  CORR 2010»
15 years 7 months ago
Loop Formulas for Description Logic Programs
Description Logic Programs (dl-programs) proposed by Eiter et al. constitute an elegant yet powerful formalism for the integration of answer set programming with description logic...
Yisong Wang, Jia-Huai You, Li-Yan Yuan, Yi-Dong Sh...
FPL
2000
Springer
95views Hardware» more  FPL 2000»
15 years 10 months ago
It's FPL, Jim - But Not as We Know It! Opportunities for the New Commercial Architectures
Following the simple Programmable Logic Device (SPLD) and Field Programmable Gate Array (FPGA) generations a third generation of programmable logic technologies is now reaching the...
Tom Kean
QEST
2005
IEEE
16 years 24 days ago
iLTLChecker: A Probabilistic Model Checker for Multiple DTMCs
iLTL is a probabilistic temporal logic that can specify properties of multiple discrete time Markov chains (DTMCs). In this paper, we describe two related tools: MarkovEstimator a...
YoungMin Kwon, Gul A. Agha