Sciweavers

8587 search results - page 1326 / 1718
» Interactive dynamic abstraction
Sort
View
IISWC
2008
IEEE
16 years 2 months ago
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
Clay Hughes, Tao Li
MICRO
2008
IEEE
114views Hardware» more  MICRO 2008»
16 years 2 months ago
Toward a multicore architecture for real-time ray-tracing
Significant improvement to visual quality for real-time 3D graphics requires modeling of complex illumination effects like soft-shadows, reflections, and diffuse lighting intera...
Venkatraman Govindaraju, Peter Djeu, Karthikeyan S...
ANSS
2007
IEEE
16 years 1 months ago
Vehicular Mobility Simulation for VANETs
During the last few years, continuous progresses in wireless communications have opened new research fields in computer networking, aimed at extending data networks connectivity ...
Marco Fiore, Jérôme Härri, Fethi...
CODES
2007
IEEE
16 years 1 months ago
Performance modeling for early analysis of multi-core systems
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
Reinaldo A. Bergamaschi, Indira Nair, Gero Dittman...
ICC
2007
IEEE
100views Communications» more  ICC 2007»
16 years 1 months ago
S.T.R.E.S.S. : Stress Testing and Reverse Engineering for System Security
— In modern wireless networks the functions included into layer II have to deal with complex problems, such as security and access control, that were previously demanded to upper...
Matteo Rosi, Leonardo Maccari, Romano Fantacci
« Prev « First page 1326 / 1718 Last » Next »