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PPL
2007
86views more  PPL 2007»
15 years 6 months ago
Failure-Sensitive Analysis of Parallel Algorithms with Controlled Memory Access Concurrency
ract problem of using P failure-prone processors to cooperatively update all locations of an N-element shared array is called Write-All. Solutions to Write-All can be used iterati...
Chryssis Georgiou, Alexander Russell, Alexander A....
ICDCS
1998
IEEE
15 years 10 months ago
A Protocol and Correctness Proofs for Real-Time High-Performance Broadcast Networks
Novel real-time applications require highperformance real-time distributed systems, and therefore high-performance real-time networks. We examine a Hard Real-Time Distributed Mult...
Jean-François Hermant, Gérard Le Lan...
ICPP
2003
IEEE
15 years 11 months ago
Hardware-Assisted Design for Fast Packet Forwarding in Parallel Routers
A hardware-assisted design, dubbed cache-oriented multistage structure (COMS), is proposed for fast packet forwarding. COMS incorporates small on-chip cache memory in its constitu...
Nian-Feng Tzeng
PODC
1996
ACM
15 years 10 months ago
Simple, Fast, and Practical Non-Blocking and Blocking Concurrent Queue Algorithms
Drawing ideas from previous authors, we present a new non-blocking concurrent queue algorithm and a new twolock queue algorithm in which one enqueue and one dequeue can proceed co...
Maged M. Michael, Michael L. Scott
PODC
2010
ACM
15 years 10 months ago
Distributed algorithms for edge dominating sets
An edge dominating set for a graph G is a set D of edges such that each edge of G is in D or adjacent to at least one edge in D. This work studies deterministic distributed approx...
Jukka Suomela