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ICMCS
2005
IEEE
104views Multimedia» more  ICMCS 2005»
16 years 1 months ago
A High-Performance Memory-Efficient Architecture of the Bit-Plane Coder in JPEG 2000
The paper presents a high-performance architecture of the bit-plane coder for the embedded block coding algorithm in JPEG 2000. The architecture adopts a pipeline structure and is...
Grzegorz Pastuszak
TACAS
2005
Springer
78views Algorithms» more  TACAS 2005»
16 years 1 months ago
Separating Fairness and Well-Foundedness for the Analysis of Fair Discrete Systems
Fair discrete systems (FDSs) are a computational model of concurrent programs where fairness assumptions are specified in terms of sets of states. The analysis of fair discrete sy...
Amir Pnueli, Andreas Podelski, Andrey Rybalchenko
ACSD
2004
IEEE
86views Hardware» more  ACSD 2004»
15 years 11 months ago
Modular Analysis of Systems Composed of Semiautonomous Subsystems
This paper reviews a proposal for the modular analysis of Petri nets and its applicability to factory automation systems. It presents new algorithms to harness this modular analys...
Charles Lakos, Laure Petrucci
AUTOMATICA
2007
82views more  AUTOMATICA 2007»
15 years 7 months ago
Simulation-based optimal sensor scheduling with application to observer trajectory planning
The sensor scheduling problem can be formulated as a controlled hidden Markov model and this paper solves the problem when the state, observation and action spaces are continuous....
Sumeetpal S. Singh, Nikolaos Kantas, Ba-Ngu Vo, Ar...
SCL
2011
15 years 2 months ago
Analysis of consensus protocols with bounded measurement errors
This paper analyzes two classes of consensus algorithms in presence of bounded measurement errors. The considered protocols adopt an updating rule based either on constant or vani...
Andrea Garulli, Antonio Giannitrapani