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HPCA
2000
IEEE
15 years 12 months ago
Design of a Parallel Vector Access Unit for SDRAM Memory Systems
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
Binu K. Mathew, Sally A. McKee, John B. Carter, Al...
INFOCOM
2000
IEEE
15 years 12 months ago
Collision Avoidance and Resolution Multiple Access for Multichannel Wireless Networks
Abstract—We introduce and analyze CARMA-MC (for Collision Avoidance and Resolution Multiple Access MultiChannel), a new stable channel access protocol for multihop wireless netwo...
Rodrigo Garcés, J. J. Garcia-Luna-Aceves
ASYNC
2004
IEEE
102views Hardware» more  ASYNC 2004»
15 years 11 months ago
Non-Uniform Access Asynchronous Register Files
Register files of microprocessors have often been cited as performance bottlenecks and significant consumers of energy. The robust and modular nature of quasi-delay insensitive (Q...
David Fang, Rajit Manohar
169
Voted
VLDB
2002
ACM
165views Database» more  VLDB 2002»
15 years 7 months ago
Chip-Secured Data Access: Confidential Data on Untrusted Servers
The democratization of ubiquitous computing (access data anywhere, anytime, anyhow), the increasing connection of corporate databases to the Internet and the today's natural ...
Luc Bouganim, Philippe Pucheral
234
Voted
SECON
2010
IEEE
15 years 5 months ago
Multiple Access Mechanisms with Performance Guarantees for Ad-Hoc Networks
This paper bears on the design and the quantitative evaluation of MAC mechanisms for wireless ad-hoc networks with performance guarantees. By this, we mean mechanisms where each ac...
Paola Bermolen, François Baccelli