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    DATE
    2005
    IEEE
    130views Hardware» more  DATE 2005»
    Design for Verification of SystemC Transaction Level Models
    16 years 7 days ago
    Design for Verification of SystemC Transaction Level Models
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    Ali Habibi, Sofiène Tahar
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    KBSE
    2005
    IEEE
    95views Software Engineering» more  KBSE 2005»
    Application of design for verification with concurrency controllers to air traffic control software
    16 years 5 days ago
    Application of design for verification with concurrency controllers to air traffic control software
    Download  www.fi.muni.cz
    Aysu Betin-Can, Tevfik Bultan, Mikael Lindvall, Be...
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    CHARME
    2005
    Springer
    119views Hardware» more  CHARME 2005»
    High-Level Modelling, Analysis, and Verification on FPGA-Based Hardware Design
    16 years 4 days ago
    High-Level Modelling, Analysis, and Verification on FPGA-Based Hardware Design
    Download  www.cesnet.cz
    Petr Matousek, Ales Smrcka, Tomás Vojnar
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    CAV
    2004
    Springer
    111views Hardware» more  CAV 2004»
    Using Interface Refinement to Integrate Formal Verification into the Design Cycle
    16 years 8 hour ago
    Using Interface Refinement to Integrate Formal Verification into the Design Cycle
    Download  chicory.stanford.edu
    Jacob Chang, Sergey Berezin, David L. Dill
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    HICSS
    2003
    IEEE
    98views Biometrics» more  HICSS 2003»
    Field Modifiable Architecture with FPGAs and its Design/Verification/Debugging Methodologies
    15 years 12 months ago
    Field Modifiable Architecture with FPGAs and its Design/Verification/Debugging Methodologies
    Download  www.hicss.hawaii.edu
    Masahiro Fujita, Satoshi Komatsu, Hiroshi Saito, K...
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