— A fully differential translinear 3-phase sinusoidal oscillator architecture is presented. The architecture is meant for BiCMOS implementation and uses only NPN devices, typical...
Dimitrios N. Loizos, Paul-Peter Sotiriadis, Gert C...
— This paper presents an analogue integrated circuit implementation of a cortical neuron model. The VLSI chip prototype has been implemented in a 0.35 µm CMOS technology. The si...
— This paper presents a new memory cell structure for content addressable memory (CAM) based on magnetic tunneling junction (MTJ). Each CAM cell employs a pair of differential MT...
—Software-based self-test (SBST) is a promising new technology for at-speed testing of embedded processors in SoC systems. This paper introduces an effective and efficient new ho...
In this paper, we describe solutions how pixel-based visualization techniques can support the decision making process for investors on the financial market. We especially focus o...
Hartmut Ziegler, Tilo Nietzschmann, Daniel A. Keim