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208
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DATE
2009
IEEE
140views Hardware» more  DATE 2009»
16 years 1 months ago
Lifetime reliability-aware task allocation and scheduling for MPSoC platforms
With the relentless scaling of semiconductor technology, the lifetime reliability of embedded multiprocessor platforms has become one of the major concerns for the industry. If th...
Lin Huang, Feng Yuan, Qiang Xu
DATE
2009
IEEE
101views Hardware» more  DATE 2009»
16 years 1 months ago
Static analysis to mitigate soft errors in register files
—With continuous technology scaling, soft errors are becoming an increasingly important design concern even for earth-bound applications. While compiler approaches have the poten...
Jongeun Lee, Aviral Shrivastava
DATE
2009
IEEE
202views Hardware» more  DATE 2009»
16 years 1 months ago
Design as you see FIT: System-level soft error analysis of sequential circuits
Soft errors in combinational and sequential elements of digital circuits are an increasing concern as a result of technology scaling. Several techniques for gate and latch hardeni...
Daniel Holcomb, Wenchao Li, Sanjit A. Seshia
239
Voted
GLOBECOM
2009
IEEE
16 years 1 months ago
Robust Cooperative Relaying in a Wireless LAN: Cross-Layer Design and Performance Analysis
—A key technology in cooperative communications is distributed space-time coding (DSTC) which achieves spatial diversity gain from multiple relays. A novel DSTC, called randomize...
Pei Liu, Chun Nie, Elza Erkip, Shivendra S. Panwar
176
Voted
GLVLSI
2009
IEEE
155views VLSI» more  GLVLSI 2009»
16 years 1 months ago
Buffer design and optimization for lut-based structured ASIC design styles
The interconnection delay of pre-fabricated design style dominates circuit delay due to the heavily downstream capacitance. Buffer insertion is a widely used technique to split o...
Po-Yang Hsu, Shu-Ting Lee, Fu-Wei Chen, Yi-Yu Liu