4396 search results - page 483 / 880 » Measuring the Architecture Design Process |
244
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DAC
2006
ACM
16 years 1 months ago
2006
ACM
This paper investigates methods for clock skew minimization using buffer and wire sizing. First, a technique that significantly improves solution quality and stability of sequent...
188
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DAC
2006
ACM
16 years 1 months ago
2006
ACM
: Creating ICs in the nanometer age is a high-stakes race that few companies can afford to compete in – and even fewer can win. Hear how senior technologists from the world’s t...
204
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CODES
2005
IEEE
16 years 1 months ago
2005
IEEE
This paper presents a novel approach for multiprocess synthesis supporting well-tailored module integration at system level. The goal is to extend the local scope of existing arch...
192
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DAC
2004
ACM
16 years 1 months ago
2004
ACM
Leakage current has become a stringent constraint in today’s processor designs in addition to traditional constraints on frequency. Since leakage current exhibits a strong inver...
188
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CSMR
2003
IEEE
16 years 27 days ago
2003
IEEE
Software visualization tools face many challenges in terms of their implementation, including scalability, usability, adaptability, and durability. Such tools, like many other res...