Sciweavers

4396 search results - page 510 / 880
» Measuring the Architecture Design Process
Sort
View
ECRTS
2007
IEEE
16 years 1 months ago
Cache-Aware Timing Analysis of Streaming Applications
Of late, there has been a considerable interest in models, algorithms and methodologies specifically targeted towards designing hardware and software for streaming applications. ...
Samarjit Chakraborty, Tulika Mitra, Abhik Roychoud...
ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
16 years 1 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
FCCM
1999
IEEE
210views VLSI» more  FCCM 1999»
15 years 12 months ago
Algorithm Analysis and Mapping Environment for Adaptive Computing Systems: Further Results
Abstract We are developing an integrated algorithm analysis and mapping environment particularly tailored for signal processing applications on Adaptive Computing Systems ACS. Our ...
Eric K. Pauer, Paul D. Fiore, John M. Smith
ICIP
2006
IEEE
16 years 9 months ago
Transcoding to FGS Streams from H.264/AVC Hierarchical B-Pictures
This paper presents a transcoder which transcodes to FGS streams from H.264/AVC hierarchical B-pictures. First, the DCT-domain architecture is designed for fast FGS transcoding. T...
Huifeng Shen, Xiaoyan Sun, Feng Wu, Houqiang Li, S...
ICIP
2009
IEEE
16 years 8 months ago
Mapping Motion Vectors For A Wyner-ziv Video Transcoder
Wyner-Ziv (WZ) coding of video utilizes simple encoders and highly complex decoders. A transcoder from a WZ codec to a traditional codec can potentially increase the range of appl...