Sciweavers

1095 search results - page 17 / 219
» Measuring the Performance of Parallel Message-Based Process ...
Sort
View
170
Voted
SPAA
2006
ACM
16 years 9 days ago
Modeling instruction placement on a spatial architecture
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
148
Voted
CAMP
2005
IEEE
16 years 18 min ago
Parallel Extraction Architecture for Image Moments of Numerous Objects
— In this paper, we propose a new architecture that can extract information of numerous objects in an image at highspeed. Various characteristics can be obtained from the image m...
Yoshihiro Watanabe, Takashi Komuro, Shingo Kagami,...
198
Voted
TPDS
2002
117views more  TPDS 2002»
15 years 6 months ago
Gemini: An Optical Interconnection Network for Parallel Processing
Abstract--The Gemini interconnect is a dual technology (optical and electrical) interconnection network designed for use in tightlycoupled multicomputer systems. It consists of a c...
Roger D. Chamberlain, Mark A. Franklin, Ch'ng Shi ...
147
Voted
NETWORK
2007
100views more  NETWORK 2007»
15 years 5 months ago
Parallel Programmable Ethernet Controllers: Performance and Security
Programmable network interfaces can provide network servers with a flexible interface to high-bandwidth Ethernet links, but they face critical software and architectural challenge...
Derek L. Schuff, Vijay S. Pai, Paul Willmann, Scot...
196
Voted
SBACPAD
2008
IEEE
206views Hardware» more  SBACPAD 2008»
16 years 22 days ago
A High Performance Massively Parallel Approach for Real Time Deformable Body Physics Simulation
Single processor technology has been evolving across last decades, but due to physical limitations of chip manufacturing process, the industry is pursuing alternatives to sustain ...
Thiago S. M. C. de Farias, Mozart W. S. Almeida, J...