1992 search results - page 223 / 399 » Memory modeling for system synthesis |
194
Voted
DAC
2008
ACM
16 years 8 months ago
2008
ACM
Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which ...
170
Voted
TACAS
2007
Springer
16 years 1 months ago
2007
Springer
This paper presents a mechanised Hoare-style programming logic framework for assembly level programs. The framework has been designed to fit on top of operational semantics of rea...
194
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DSN
2002
IEEE
16 years 1 hour ago
2002
IEEE
This paper examines the effect of technology scaling and microarchitectural trends on the rate of soft errors in CMOS memory and logic circuits. We describe and validate an end-to...
165
Voted
EMSOFT
2009
Springer
16 years 1 months ago
2009
Springer
In this paper, we propose a formal analysis approach to estimate the expected (average) data cache access time of an application across all possible program inputs. Towards this g...
188
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HICSS
2003
IEEE
16 years 10 days ago
2003
IEEE
The effective management of knowledge is critical for organizations that are striving to gain or maintain a competitive advantage and that are in the process of re-structuring for...