A technique is presented to predict the performance behavior of control circuits for a linear FIFO. The control circuit consists of a linear chain of RendezVous elements, also cal...
Jo C. Ebergen, Scott Fairbanks, Ivan E. Sutherland
Register files (RF) represent a substantial portion of the energy budget in modern processors, and are growing rapidly with the trend towards wider instruction issue. The actual ...
High performance architectures depend heavily on efficient multi-level memory hierarchies to minimize the cost of accessing data. This dependence will increase with the expected i...
We present a dynamic programming technique for solving the multiple supply voltage scheduling problem in both nonpipelined and functionally pipelined data-paths. The scheduling pro...
Designers often apply manual or semi-automatic loop and data transformations on array and loop intensive programs to improve performance. The transformations should preserve the fu...
Sven Verdoolaege, Gerda Janssens, Maurice Bruynoog...