3387 search results - page 314 / 678 » Model-Checking for Real-Time Systems |
213
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ICCD
2005
IEEE
16 years 26 days ago
2005
IEEE
— With the success of formal verification techniques like equivalence checking and model checking for hardware designs, there has been growing interest in applying such techniqu...
196
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LPNMR
2001
Springer
15 years 11 months ago
2001
Springer
In this paper bounded model checking of asynchronous concurrent systems is introduced as a promising application area for answer set programming. As the model of asynchronous syst...
196
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VSTTE
2005
Springer
16 years 22 days ago
2005
Springer
The interplay back and forth between software model checking and hardware model checking has been fruitful for both. Originally intended for the analysis of concurrent software, mo...
175
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FOSSACS
2001
Springer
15 years 11 months ago
2001
Springer
Abstract. Among the branching-time temporal logics used for the specification and verification of systems, CTL+ , FCTL and ECTL+ are the most notable logics for which the precise...
199
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QEST
2007
IEEE
16 years 1 months ago
2007
IEEE
Failure Mode and Effect Analysis (FMEA) is a method for assessing cause-consequence relations between component faults and hazards that may occur during the lifetime of a system. ...