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CGO
2004
IEEE
15 years 10 months ago
Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors
Pre-execution techniques have received much attention as an effective way of prefetching cache blocks to tolerate the everincreasing memory latency. A number of pre-execution tech...
Dongkeun Kim, Shih-Wei Liao, Perry H. Wang, Juan d...
ICPP
1997
IEEE
15 years 10 months ago
The Affinity Entry Consistency Protocol
In this paper we propose a novel software-only distributed sharedmemory system (SW-DSM), the Affinity Entry Consistency (AEC) protocol. The protocol is based on Entry Consistency ...
Cristiana Bentes Seidel, Ricardo Bianchini, Claudi...
ICDCS
1995
IEEE
15 years 10 months ago
Specifying Weak Sets
nt formal speci cations of a new abstraction, weak sets, which can be used to alleviate high latencies when retrieving data from a wide-area information system like the World Wide...
Jeannette M. Wing, David C. Steere
LISA
2007
15 years 8 months ago
Application Buffer-Cache Management for Performance: Running the World's Largest MRTG
An operating system’s readahead and buffer-cache behaviors can significantly impact application performance; most often these better performance, but occasionally they worsen it...
David Plonka, Archit Gupta, Dale Carder
EXPCS
2007
15 years 8 months ago
Pipeline spectroscopy
Pipeline Spectroscopy is a new technique that allows us to measure the cost of each cache miss. The cost of a miss is displayed (graphed) as a histogram, which represents a precis...
Thomas R. Puzak, Allan Hartstein, Philip G. Emma, ...