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DFT
1998
IEEE
78views VLSI» more  DFT 1998»
15 years 12 months ago
A System for Evaluating On-Line Testability at the RT-level
This paper presents a system to evaluate the testability of an on-line testable circuit. The system operates at the RT-level, before the logic synthesis step, and allows for an ex...
Silvia Chiusano, Fulvio Corno, Matteo Sonza Reorda...
ICPP
1993
IEEE
15 years 11 months ago
Data-Parallel R-Tree Algorithms
Abstract Data-parallel algorithms for R-trees, a common spatial data structure are presented, in the domain of planar line segment data e.g., Bureau of the Census TIGER Line les....
Erik G. Hoel, Hanan Samet
ICPP
1994
IEEE
15 years 11 months ago
Data-Parallel Spatial Join Algorithms
E cient data-parallel spatial join algorithms for pmr quadtrees and R-trees, common spatial data structures, are presented. The domain consists of planar line segment data i.e., Bu...
Erik G. Hoel, Hanan Samet
227
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ESOP
1992
Springer
15 years 11 months ago
A Provably Correct Compiler Generator
We have designed, implemented, and proved the correctness of a compiler generator that accepts action semantic descriptions of imperative programming languages. The generated comp...
Jens Palsberg
CBSE
2004
Springer
15 years 11 months ago
Viewpoints for Specifying Component-Based Systems
There is a conceptual gap between the way we currently articulate requirements and the reuse-driven paradigm embodied in component-based system development. The principal challenge...
Gerald Kotonya, John Hutchinson