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DATE
2007
IEEE
80views Hardware» more  DATE 2007»
16 years 1 months ago
Microarchitecture floorplanning for sub-threshold leakage reduction
Lateral heat conduction between modules affects the temperature profile of a floorplan, affecting the leakage power of individual blocks which increasingly is becoming a larger ...
Hushrav Mogal, Kia Bazargan
DATE
2007
IEEE
92views Hardware» more  DATE 2007»
16 years 1 months ago
Overcoming glitches and dissipation timing skews in design of DPA-resistant cryptographic hardware
Cryptographic embedded systems are vulnerable to Differential Power Analysis (DPA) attacks. In this paper, we propose a logic design style, called as Precharge Masked Reed-Muller ...
Kuan Jen Lin, Shan Chien Fang, Shih Hsien Yang, Ch...
DATE
2007
IEEE
108views Hardware» more  DATE 2007»
16 years 1 months ago
Speeding up SystemC simulation through process splitting
This paper presents a new approach that can be used to speed up SystemC simulations by automatically optimizing the model for simulation. The work addresses the inefficiency of th...
Youssef N. Naguib, Rafik S. Guindi
DATE
2007
IEEE
98views Hardware» more  DATE 2007»
16 years 1 months ago
A one-shot configurable-cache tuner for improved energy and performance
We introduce a new non-intrusive on-chip cache-tuning hardware module capable of accurately predicting the best configuration of a configurable cache for an executing application....
Ann Gordon-Ross, Pablo Viana, Frank Vahid, Walid A...
FBIT
2007
IEEE
16 years 1 months ago
Developmental Evaluation in Genetic Programming: A Position Paper
—Standard genetic programming genotypes are generally highly disorganized and poorly structured, with little code replication. This is also true of existing developmental genetic...
Tuan Hao Hoang, Robert I. McKay, Daryl Essam, Nguy...