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SAMOS
2004
Springer
16 years 10 days ago
Scalable Instruction-Level Parallelism.
This paper presents a model for instruction-level distributed computing that allows the implementation of scalable chip multiprocessors. Based on explicit microthreading it serves ...
Chris R. Jesshope
VLDB
2004
ACM
180views Database» more  VLDB 2004»
16 years 10 days ago
Bloom Histogram: Path Selectivity Estimation for XML Data with Updates
Cost-based XML query optimization calls for accurate estimation of the selectivity of path expressions. Some other interactive and internet applications can also benefit from suc...
Wei Wang 0011, Haifeng Jiang, Hongjun Lu, Jeffrey ...
198
Voted
HICSS
2003
IEEE
215views Biometrics» more  HICSS 2003»
16 years 8 days ago
A Field Study of Use of Synchronous Chat in Online Courses
A field study of Computer Mediated Communication (CMC) as used in higher education asks the questions, "Will students take part in synchronous chat sessions if they are sched...
David H. Spencer, Starr Roxanne Hiltz
ISCA
2003
IEEE
108views Hardware» more  ISCA 2003»
16 years 8 days ago
Effective ahead Pipelining of Instruction Block Address Generation
On a N-way issue superscalar processor, the front end instruction fetch engine must deliver instructions to the execution core at a sustained rate higher than N instructions per c...
André Seznec, Antony Fraboulet
SIGUCCS
2003
ACM
16 years 7 days ago
What's old is new again: training is the information technology constant
This paper is an account of some of the more instructive experiences we gained as we sought to ensure that our information technology training programs kept pace with a fast chang...
George Bradford