This paper describes a two-state methodology for register transfer level (RTL) logic simulation in which the use of the Xstate is completely eliminated inside ASIC designs. Exampl...
We describe EXPRESSION, a language supporting architectural design space exploration for embedded Systems-onChip (SOC) and automatic generation of a retargetable compiler/simulato...
Ashok Halambi, Peter Grun, Vijay Ganesh, Asheesh K...
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behaviour. Asynchronous spee...
Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, ...
Abstract. Source code transformations are a very effective method of parallelizing and improving the efficiency of programs. Unfortunately most compiler systems require implementin...
This paper focuses on active networks applications and in particular on the possible interactions among these applications. Active networking is a very promising research field wh...
Luca Delgrossi, Giuseppe Di Fatta, Domenico Ferrar...