84 search results - page 16 / 17 » NBTI-Aware Synthesis of Digital Circuits |
157
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DAC
1995
ACM
15 years 10 months ago
1995
ACM
High-level synthesis (HLS) has been successfully targeted towards the digital signal processing (DSP) domain. Both application-speci c integrated circuits (ASICs) and application-...
172
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CONCUR
2010
Springer
15 years 6 months ago
2010
Springer
ompositionality of Round Abstraction Abstract Dan R. Ghica and Mohamed N. Menaa University of Birmingham, U.K. We revisit a technique called round abstraction as a solution to the ...
166
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ICES
2005
Springer
16 years 1 days ago
2005
Springer
Evolvable Hardware arises as a promising solution for automatic digital synthesis of digital and analog circuits. During the last decade, a special interest has been focused on evo...
159
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ISCAS
2005
IEEE
16 years 3 days ago
2005
IEEE
Abstract— This paper presents and evaluates a hybrid implementation of a low complexity algorithm for speech enhancement, the Adaptive Gain Equalizer (AGE). The AGE is a subband ...
183
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FPGA
2010
ACM
16 years 3 months ago
2010
ACM
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...