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MOBICOM
2012
ACM
13 years 9 months ago
MIDU: enabling MIMO full duplex
Given that full duplex (FD) and MIMO both employ multiple antenna resources, an important question that arises is how to make the choice between MIMO and FD? We show that optimal ...
Ehsan Aryafar, Mohammad Ali Khojastepour, Karthike...
DAC
2007
ACM
16 years 8 months ago
Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
Kunhyuk Kang, Kee-Jong Kim, Kaushik Roy
EDBT
2006
ACM
143views Database» more  EDBT 2006»
16 years 7 months ago
XG: A Grid-Enabled Query Processing Engine
In [12] we introduce a novel architecture for data processing, based on a functional fusion between a data and a computation layer. In this demo we show how this architecture is le...
Radu Sion, Ramesh Natarajan, Inderpal Narang, Thom...
ICCAD
2006
IEEE
103views Hardware» more  ICCAD 2006»
16 years 4 months ago
A statistical framework for post-silicon tuning through body bias clustering
Adaptive body biasing (ABB) is a powerful technique that allows post-silicon tuning of individual manufactured dies such that each die optimally meets the delay and power constrai...
Sarvesh H. Kulkarni, Dennis Sylvester, David Blaau...
ISQED
2010
IEEE
141views Hardware» more  ISQED 2010»
16 years 2 months ago
Assessing chip-level impact of double patterning lithography
—Double patterning lithography (DPL) provides an attractive alternative or a supplementary method to enable the 32nm and 22nm process nodes, relative to costlier technology optio...
Kwangok Jeong, Andrew B. Kahng, Rasit Onur Topalog...
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