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» Neural networks: Algorithms and applications
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MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
15 years 5 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
P2P
2010
IEEE
135views Communications» more  P2P 2010»
15 years 5 months ago
QoE in Pull Based P2P-TV Systems: Overlay Topology Design Tradeoffs
Abstract—This paper presents a systematic performance analysis of pull P2P video streaming systems for live applications, providing guidelines for the design of the overlay topol...
R. Fortuna, Emilio Leonardi, Marco Mellia, Michela...
INFOCOM
2011
IEEE
14 years 10 months ago
Sensor localization with deterministic accuracy guarantee
—Localizability of network or node is an important subproblem in sensor localization. While rigidity theory plays an important role in identifying several localizability conditio...
Ryo Sugihara, Rajesh K. Gupta
TON
2010
158views more  TON 2010»
15 years 5 months ago
Always acyclic distributed path computation
Abstract—Distributed routing algorithms may give rise to transient loops during path recomputation, which can pose significant stability problems in high-speed networks. We pres...
Saikat Ray, Roch Guérin, Kin Wah Kwong, Rut...
CODES
2007
IEEE
16 years 1 months ago
Channel trees: reducing latency by sharing time slots in time-multiplexed networks on chip
Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip communication infrastructure. A growing number of applications, often with firm (FRT) or so...
Andreas Hansson, Martijn Coenen, Kees Goossens