144 search results - page 7 / 29 » New Non-Volatile Memory Structures for FPGA Architectures |
165
Voted
NOCS
2007
IEEE
16 years 19 days ago
2007
IEEE
We present a novel network-on-chip-based architecture for future programmable chips (FPGAs). A key challenge for FPGA design is supporting numerous highly variable design instance...
166
Voted
DAC
1994
ACM
15 years 10 months ago
1994
ACM
- This paper studies the routing problem for a new Field-Programmable Gate Array (FPGA) and Field-Programmable Interconnect Chip (FPIC) routing architecture which improves upon the...
175
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EUROGP
2000
Springer
15 years 10 months ago
2000
Springer
The use of FPGA based custom computing platforms is proposed for implementing linearly structured Genetic Programs. Such a context enables consideration of micro architectural and ...
186
Voted
HPCA
2011
IEEE
14 years 10 months ago
2011
IEEE
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...
210
Voted
IPPS
2010
IEEE
15 years 4 months ago
2010
IEEE
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...