— Low-Density Parity-Check Convolutional Codes (LDPC-CCs) are an attractive alternative to their block-oriented counterparts, LDPC-BCs. In this paper, we introduce these codes an...
This paper presents a new approach on combined highlevel synthesis and partitioning for FPGA-based multi-chip emulation systems. The goal is to synthesize a prototype with maximal...
Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
By-wire systems have been established for several years in the area of aircraft construction and there are now approaches to utilize this technology in vehicles. The required elect...
Thomas Ringler, J. Steiner, R. Belschner, Bernd He...
This paper presents a new on-chip time measurement architecture which is based on the Timeto-Digital Conversion (TDC) method that is capable of achieving a timing resolution of te...
This paper describes the Amorphous FPGA, an innovative architecture attempting to optimally allocate logic and routing resource on per-mapping basis. Designed for high performance...