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ISCAS
2003
IEEE
112views Hardware» more  ISCAS 2003»
16 years 20 days ago
Architectures for function evaluation on FPGAs
This paper presents a new family of architectures for multi-cycle area-efficient evaluation of elementary and composite functions, and an exploration of the design tradeoffs for i...
Nalin Sidahao, George A. Constantinides, Peter Y. ...
WECWIS
2000
IEEE
155views ECommerce» more  WECWIS 2000»
15 years 11 months ago
Distributed and Scalable XML Document Processing Architecture for E-Commerce Systems
XML has become a very important emerging standard for E-commerce because of its flexibility and universality. Many software designers are actively developing new systems to handle...
David Wai-Lok Cheung, Sau Dan Lee, Thomas Lee, Wil...
FPGA
1999
ACM
130views FPGA» more  FPGA 1999»
15 years 11 months ago
Hybrid Product Term and LUT Based Architectures Using Embedded Memory Blocks
The Embedded System Block (ESB) of the APEX20K programmable logic device family from Altera Corporation includes the capability of implementing product term macrocells in addition...
Frank Heile, Andrew Leaver
MICRO
1994
IEEE
81views Hardware» more  MICRO 1994»
15 years 11 months ago
Register file port requirements of transport triggered architectures
Exploitation of large amounts of instruction level parallelism requires a large amount of connectivity between the shared register file and the function units; this connectivity i...
Jan Hoogerbrugge, Henk Corporaal
IFIP
1993
Springer
15 years 11 months ago
The Purdue Enterprise Reference Architecture
The Fluor Daniel Company, a major engineering consulting and construction firm, is applying the Purdue Enterprise Reference Architecture and Methodology (PERA) to their project wo...
Theodore J. Williams