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JTRES
2010
ACM
15 years 7 months ago
WCET driven design space exploration of an object cache
In order to guarantee that real-time systems meet their timing specification, static execution time bounds need to be calculated. Not considering execution time predictability led...
Benedikt Huber, Wolfgang Puffitsch, Martin Schoebe...
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
16 years 4 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
ISPAN
2000
IEEE
15 years 11 months ago
Versatile Processor Design for Efficiency and High Performance
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
Sotirios G. Ziavras
CCS
2008
ACM
15 years 9 months ago
Deconstructing new cache designs for thwarting software cache-based side channel attacks
Software cache-based side channel attacks present a serious threat to computer systems. Previously proposed countermeasures were either too costly for practical use or only effect...
Jingfei Kong, Onur Aciiçmez, Jean-Pierre Se...
CODES
2008
IEEE
15 years 9 months ago
A time-predictable system initialization design for huge-capacity flash-memory storage systems
The capacity of flash-memory storage systems grows at a speed similar to many other storage systems. In order to properly manage the product cost, vendors face serious challenges ...
Chin-Hsien Wu