1 Most engineering artifacts are designed and analyzed2 today within a 3-D computer aided design (CAD)3 environment. However, slender objects such as beams are4 designed in a 3-D e...
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
Networks-on-Chip (NoCs) have recently emerged as a scalable alternative to classical bus and point-to-point architectures. To date, performance evaluation of NoC designs is largel...
Fault Tree Analysis (FTA) is a safety-analysis technique that has been recently extended to accommodate product-line engineering for critical domains. This paper describes a tool-...
Characterized by simultaneous measurement of the effects of experimental factors and their interactions, the economic and efficient factorial design is well accepted in microarray ...
Qihua Tan, Jesper Dahlgaard, Basem M. Abdallah, We...