Sciweavers

9739 search results - page 359 / 1948
» Object-Oriented Analysis and Design
Sort
View
215
Voted
COMSWARE
2007
IEEE
16 years 1 months ago
A Parallelization of ECDSA Resistant to Simple Power Analysis Attacks
The Elliptic Curve Digital Signature Algorithm admits a natural parallelization wherein the point multiplication step can be split in two parts and executed in parallel. Further pa...
Sarang Aravamuthan, Viswanatha Rao Thumparthy
192
Voted
DAC
2005
ACM
15 years 9 months ago
Parameterized block-based statistical timing analysis with non-gaussian parameters, nonlinear delay functions
Variability of process parameters makes prediction of digital circuit timing characteristics an important and challenging problem in modern chip design. Recently, statistical stat...
Hongliang Chang, Vladimir Zolotov, Sambasivan Nara...
177
Voted
DAC
2002
ACM
16 years 8 months ago
Hole analysis for functional coverage data
One of the main goals of coverage tools is to provide the user with informative presentation of coverage information. Specifically, information on large, cohesive sets of uncovere...
Oded Lachish, Eitan Marcus, Shmuel Ur, Avi Ziv
170
Voted
DAC
2003
ACM
16 years 8 months ago
Temporofunctional crosstalk noise analysis
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. This paper proposes a method of characterizing correlation of signal tra...
Donald Chai, Alex Kondratyev, Yajun Ran, Kenneth H...
218
Voted
DAC
2006
ACM
16 years 8 months ago
Statistical logic cell delay analysis using a current-based model
A statistical model for the purpose of logic cell timing analysis in the presence of process variations is presented. A new current-based cell delay model is utilized, which can a...
Hanif Fatemi, Shahin Nazarian, Massoud Pedram